Dr. Chithira P. R.
Dr. Chithira P. R.
Assistant Professor Grade II
Office Address:
IT-Lab : 204
B.Tech (Electronics and Communication) from Model Engineering College, Cochin
M.Tech (Microelectronics and VLSI design) from NIT Calicut
Ph.D. (Electrical engineering) from IIT Madras
Educational Qualifications
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B.Tech (Electronics and Communication) from Model Engineering College, Cochin
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M.Tech (Microelectronics and VLSI design) from NIT Calicut
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Ph.D. (Electrical engineering) from IIT Madras
Journals
- Chithira P. R and V. Vasudevan, A Hierarchical Technique for Statistical Path Selection and Criticality Computation, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 23, No. 1, Article 9, August 2017, pp 1-24 2. Chithira P. R. and V. Vasudevan, Potential Critical Path Selection Based on a Time-Varying Statistical Timing Analysis Framework, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 27, NO. 6, JUNE 2019, pp 1438 - 1449
Statistical timing analysis, Timing analysis and reliability, Bayesian inference techniques in EDA
IEEE Member